Albasha / Elfadel | VLSI-SoC 2023: Innovations for Trustworthy Artificial Intelligence | Buch | 978-3-031-70946-3 | sack.de

Buch, Englisch, Band 680, 320 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 662 g

Reihe: IFIP Advances in Information and Communication Technology

Albasha / Elfadel

VLSI-SoC 2023: Innovations for Trustworthy Artificial Intelligence

31st IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2023, Sharjah, United Arab Emirates, October 16-18, 2023, Revised Extended Selected Papers
2024
ISBN: 978-3-031-70946-3
Verlag: Springer International Publishing

31st IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2023, Sharjah, United Arab Emirates, October 16-18, 2023, Revised Extended Selected Papers

Buch, Englisch, Band 680, 320 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 662 g

Reihe: IFIP Advances in Information and Communication Technology

ISBN: 978-3-031-70946-3
Verlag: Springer International Publishing


This book contains revised and extended versions of a selection of papers presented at the 31st IFIP WG 10.5/IEEE International Conference on the theme of VLSI-SoC Innovations for Trustworthy Artificial Intelligence, VLSI-SoC 2023, held in Sharjah, United Arab Emirates, during October 16–18, 2023.

The 15 full papers included in this volume were carefully revised and expanded from 77 papers submitted to the conference. This edited volume has been organized into four parts: architectures; accelerators; resiliency and robustness; and security and privacy - and is representing cutting-edge research at the forefront of VLSI technology.

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Zielgruppe


Research

Weitere Infos & Material


Architectures.- Synthesis of SFQ Circuits with Compound Gates.- Architecture-Compiler Co-Design for ReRAM-based Multi-Core CIM Architectures.- A Leap of Confidence: A Write-Intensity aware Prudent Page Migration for Hybrid Memories.- Efficient Depth Optimization in Quantum Addition and Modular Arithmetic with Ling Structure.- Accelerators.- Exploring Constrained-Modulus Modular Multipliers for Improved Area, Power and Flexibility.- Accelerating Large Kernel Convolutions with Nested Winograd Transformation.- A Unified and Energy-Efficient Depthwise Separable Convolution Accelerator.- Resiliency and Robustness.- Analyzing the Reliability of TCUs Through Micro-architecture and Structural Evaluations for Two Real Number Formats.- Advanced Quality Assurance Platform for Robust Process Design Kits.- FPGA-Implementation Techniques to Efficiently Test Application Readiness of Mixed-Signal Products.- Radiation Tolerant 14T SRAM Cell for Avionics Applications.- 3.125GS/s, 4.9 ENOB, 109 fJ/Conversion Time-Domain ADC for Backplane Interconnect.-Security and Privacy.- Enhancing HW-SW Confidentiality Verification for Embedded Processors with SoftFlow’s Advanced Memory Range Feature.- Confidential Inference in Decision Trees.- Enhancing the Security of IJTAG network using Inherently Secure SIB.



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