Buch, Englisch, Band 1166, 478 Seiten, Paperback, Format (B × H): 155 mm x 235 mm, Gewicht: 1500 g
First International Conference, FMCAD '96, Palo Alto, CA, USA, November 6 - 8, 1996, Proceedings
Buch, Englisch, Band 1166, 478 Seiten, Paperback, Format (B × H): 155 mm x 235 mm, Gewicht: 1500 g
Reihe: Lecture Notes in Computer Science
ISBN: 978-3-540-61937-6
Verlag: Springer Berlin Heidelberg
The 25 revised full papers presented were selected from a total of 65 submissions; also included are three invited survey papers and four tutorial contributions. The volume covers all relevant formal aspects of work in computer-aided systems design, including verification, synthesis, and testing.
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
- Mathematik | Informatik EDV | Informatik Technische Informatik Externe Speicher & Peripheriegeräte
- Interdisziplinäres Wissenschaften Wissenschaften: Forschung und Information Kybernetik, Systemtheorie, Komplexe Systeme
- Technische Wissenschaften Technik Allgemein Konstruktionslehre und -technik
- Mathematik | Informatik EDV | Informatik Angewandte Informatik Computeranwendungen in Wissenschaft & Technologie
- Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Programmierung: Methoden und Allgemeines
- Mathematik | Informatik EDV | Informatik Informatik Logik, formale Sprachen, Automaten
- Mathematik | Informatik EDV | Informatik Technische Informatik Hardware: Grundlagen und Allgemeines
- Mathematik | Informatik EDV | Informatik Professionelle Anwendung Computer-Aided Design (CAD)
- Technische Wissenschaften Technik Allgemein Computeranwendungen in der Technik
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Robotik
- Mathematik | Informatik Mathematik Mathematik Interdisziplinär Systemtheorie
- Mathematik | Informatik EDV | Informatik Informatik Künstliche Intelligenz Wissensbasierte Systeme, Expertensysteme
- Geisteswissenschaften Design Produktdesign, Industriedesign
- Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Software Engineering Objektorientierte Softwareentwicklung
Weitere Infos & Material
The need for formal methods for integrated circuit design.- Verification of all circuits in a floating-point unit using word-level model checking.- *BMDs can delay the use of theorem proving for verifying arithmetic assembly instructions.- Modular verification of multipliers.- Verification of IEEE compliant subtractive division algorithms.- Hierarchical verification of two-dimensional high-speed multiplication in PVS: A case study.- Experiments in automating hardware verification using inductive proof planning.- Verifying nondeterministic implementations of deterministic systems.- A methodology for processor implementation verification.- Coverage-directed test generation using symbolic techniques.- Self-consistency checking.- Inverting the abstraction mapping: A methodology for hardware verification.- Validity checking for combinations of theories with equality.- A unified approach for combining different formalisms for hardware verification.- Verification using uninterpreted functions and finite instantiations.- Formal verification of the Island Tunnel Controller using Multiway Decision Graphs.- VIS.- PVS: Combining specification, proof checking, and model checking.- HOL Light: A tutorial introduction.- A tutorial on digital design derivation using DRS.- ACL2 theorems about commercial microprocessors.- Formal synthesis in circuit design — A classification and survey.- Formal specification and verification of VHDL.- Specification of control flow properties for verification of synthesized VHDL designs.- An algebraic model of correctness for superscalar microprocessors.- Mechanically checking a lemma used in an automatic verification tool.- Automatic generation of invariants in processor verification.- A brief study of BDD package performance.- Local encodingtransformations for optimizing OBDD-representations of finite state machines.- Decomposition techniques for efficient ROBDD construction.- BDDs vs. Zero-Suppressed BDDs: for CTL symbolic model checking of Petri nets.- HDL-based integration of formal methods and CAD tools in the PREVAIL environment.