Advanced Verification Techniques

A SystemC Based Approach for Successful Tapeout
1. Auflage. Softcover version of original hardcover Auflage 2004
ISBN: 978-1-4419-5409-1
Verlag: Springer US

Buch, Englisch, 376 Seiten, Previously published in hardcover, Format (B × H): 210 mm x 279 mm, Gewicht: 971 g

"As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and that the costs associated with functional verification are now outweighing the costs of chip design. To cope with these challenges engineers are increasingly relying on new design and verification methodologies and languages.  Transaction-based design and verification, constrained random stimulus generation, functional coverage analysis, and assertion-based verification are all techniques that advanced design and verification teams routinely use today. Engineers are also increasingly turning to design and verification models based on C/C++ and SystemC in order to build more abstract, higher performance hardware and software models and to escape the limitations of RTL HDLs. This new book, Advanced Verification Techniques, provides specific guidance for these advanced verification techniques. The book includes realistic examples and shows how SystemC and SCV can be applied to a variety of advanced design and verification tasks."
                                                                                     - Stuart Swan

Zielgruppe

Research

Autoren/Hrsg.

Drucker, Leonard

Singh, Leena

Fachgebiete

• Technische Wissenschaften Technik Allgemein Computeranwendungen in der Technik
• Technische Wissenschaften Technik Allgemein Konstruktionslehre und -technik
• Geisteswissenschaften Design Produktdesign, Industriedesign
• Mathematik | Informatik EDV | Informatik Angewandte Informatik Computeranwendungen in Wissenschaft & Technologie
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
• Mathematik | Informatik EDV | Informatik Professionelle Anwendung Computer-Aided Design (CAD)
• Technische Wissenschaften Energietechnik | Elektrotechnik Elektrotechnik

Inhaltsverzeichnis

Verification Process.- Using SCV for Verification.- Functional Verification Testplan.- Testbench Concepts using SystemC.- Verification Methodology.- Regression/Setup and Run.- Functional Coverage.- Dynamic Memory Modeling.- Post Synthesis Gate Simulation.