Buch, Englisch, 102 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 195 g
Buch, Englisch, 102 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 195 g
Reihe: Analog Circuits and Signal Processing
ISBN: 978-90-481-7562-8
Verlag: Springer Netherlands
At 90 nm, wires account for nearly 75% of the total delay in a circuit. Even more insidious, however, is that among nearly 40% of these nets, more than 50% of their total net capacitance are attributed to the cross-coupling capacitance between neighboring signals. At this point a new design and optimization paradigm based on real wires is required. Nanometer routers must prevent and correct these effects on-the-fly in order to reach timing closure. From a manufacturability standpoint, nanometer routers must explicitly deal with the ever increasing design complexity, and be capable of adapting to the constraint requirements of timing, signal integrity, process antenna effect, and new interconnect architecture such as X-architecture.
In the nanometer era, we must look into new-generation routing technologies that combine high performance and capacity with the integration of congestion, timing, SI prevention, and DFM algorithms as the best means of getting to design closure quickly. In this book, we present a novel multilevel full-chip router, namely mSIGMA for SIGnal-integrity and MAnufacturability optimization. And these routing technologies will ensure faster time-to-market and time-to-profitability.
Zielgruppe
Professional/practitioner
Autoren/Hrsg.
Fachgebiete
- Mathematik | Informatik EDV | Informatik Professionelle Anwendung Computer-Aided Design (CAD)
- Naturwissenschaften Physik Quantenphysik
- Mathematik | Informatik EDV | Informatik Angewandte Informatik Computeranwendungen in Wissenschaft & Technologie
- Technische Wissenschaften Technik Allgemein Computeranwendungen in der Technik
- Technische Wissenschaften Technik Allgemein Nanotechnologie
- Geisteswissenschaften Design Produktdesign, Industriedesign
- Technische Wissenschaften Technik Allgemein Konstruktionslehre und -technik
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
Weitere Infos & Material
Routing Challenges for Nanometer Technology.- Multilevel Full-Chip Routing Considering Crosstalk And Performance.- Multilevel Full-Chip Routing Considering Antenna Effect Avoidance.- Multilevel Full-Chip Routing For The X-Based Architecture.- Concluding Remarks And Future Work.