INTRO TO LOGIC CIRCUIT TESTING

Erscheinungsjahr 2008
ISBN: 978-1-59829-350-0
Verlag: MORGAN & CLAYPOOL

Buch, Englisch, 100 Seiten, Paperback, Format (B × H): 187 mm x 235 mm

Reihe: Synthesis Lectures on Digital Circuits and Systems

An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)-based digital circuits. Chapter 2 introduces the major concepts of all test generation techniques such as redundancy, fault coverage, sensitization, and backtracking. Chapter 3 introduces the key concepts of testability, followed by some ad hoc design-for-testability rules that can be used to enhance testability of combinational circuits. Chapter 4 deals with test generation and response evaluation techniques used in BIST (built-in self-test) schemes for VLSI chips.

Autoren/Hrsg.

Inhaltsverzeichnis

- Introduction
- Fault Detection in Logic Circuits
- Design for Testability
- Built-in Self-Test
- References