Crosstalk in Modern On-Chip Interconnects

A FDTD Approach
1. Auflage 2016
ISBN: 978-981-10-0799-6
Verlag: Springer Nature Singapore

Buch, Englisch, 116 Seiten, Format (B × H): 155 mm x 235 mm, Gewicht: 2117 g

Reihe: SpringerBriefs in Applied Sciences and Technology

The book provides accurate FDTD
models for on-chip interconnects, covering most recent advancements in
materials and design. Furthermore, depending on the geometry and physical
configurations, different electrical equivalent models for CNT and GNR based
interconnects are presented. Based on the electrical equivalent models the
performance comparison among the Cu, CNT and GNR-based interconnects are also
discussed in the book. The proposed models are validated with the HSPICE
simulations.

The book introduces the current
research scenario in the modeling of on-chip interconnects. It presents the
structure, properties, and characteristics of graphene based on-chip
interconnects and the FDTD modeling of Cu based on-chip interconnects. The
model considers the non-linear effects of CMOS driver as well as the
transmission line effects of interconnect line that includes coupling
capacitance and mutual inductance effects. In a more realistic manner, the
proposed model includes theeffect of width-dependent MFP of the MLGNR while
taking into account the edge roughness.

Zielgruppe

Research

Autoren/Hrsg.

Kaushik, B. K.

Patnaik, Amalendu

Kumar, V. Ramesh

Fachgebiete

• Technische Wissenschaften Maschinenbau | Werkstoffkunde Technische Mechanik | Werkstoffkunde Materialwissenschaft: Biomaterialien, Nanomaterialien, Kohlenstoff
• Technische Wissenschaften Maschinenbau | Werkstoffkunde Technische Mechanik | Werkstoffkunde Materialwissenschaft: Elektronik, Optik
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise

Inhaltsverzeichnis

Introduction to On-chip Interconnects and Modeling.- Interconnect Modeling, CNT and GNR Structure, Properties and Characteristics.- FDTD Model for Crosstalk Analysis of CMOS Gate-Driven Coupled Copper Interconnects.- FDTD Model for Crosstalk Analysis of Multiwall Carbon Nanotube (MWCNT) Interconnects.- Crosstalk Modeling with Width Dependent MFP in MLGNR Interconnects Using FDTD Technique.- An Efficient US-FDTD Model for Crosstalk  Analysis of On-chip Interconnects.

Über Autor(innen)

Brajesh Kumar Kaushik received the B.E. degree in Electronics and
Communication Engineering from the D.C.R. University of Science and Technology
(formerly C. R. State College of
Engineering), Murthal, Haryana, in 1994, the M.Tech degree in Engineering
Systems from Dayalbagh Educational Institute, Agra, India, in 1997, and the PhD
degree under AICTE-QIP scheme from the Indian Institute of Technology Roorkee,
Roorkee, India, in 2007. He served at Vinytics Peripherals Pvt. Ltd., Delhi
from 1997 to 1998 as the Research and Development Engineer for microprocessor-,
microcontroller-, and DSP processor-based systems.
He
joined the department of Electronics and Communication Engineering, G.B. Pant
Engineering College, Pauri Garhwal, Uttarakhand, India as a Lecturer in July,
1998, where later he served as an Assistant Professor from May 2005 to May 2006
and an Associate Professor from May 2006 to December 2009. He is currently
serving as Associate Professor in the departmentof Electronics and Communication
Engineering, Indian Institute of Technology Roorkee. His research interests
include high-speed interconnects, low-power VLSI design, carbon nanotube-based
designs, organic thin-film transistor design and modeling, and
spintronics-based devices and circuits. He has published extensively in several
national and international journals and conferences of repute. Dr. Kaushik is a
reviewer of many international journals belonging to various publication houses
such as IEEE, IET, Elsevier, Springer, Emerald, Taylor and Francis, etc. He has
also delivered many keynote addresses in reputed international and national
conferences. He holds the
position of Editor and Editor-in-Chief of various journals in the field of VLSI
and Microelectronics. Dr. Kaushik is
Editor-in-Chief of International Journal of VLSI Design and Communication
System (VLSICS), AIRCC Publishing Corporation. He also holds the position
of Editor of Microelectronics Journal (MEJ), Elsevier Inc.; Journal
of Engineering, Design and Technology (JEDT), Emerald Group Publishing
Limited; and Journal of Electrical and Electronics Engineering Research
(JEEER), Academic Journals. He is a Senior Member of IEEE and has received
many awards and recognitions from the International Biographical Center,
Cambridge, U.K. His name has been listed in Marquis Who’s Who in Science and
Engineering and Marquis Who’s Who in the World.

Vobulapuram Ramesh Kumar
received the B.Tech degree in Electronics and Communication Engineering from
Bapatla Engineering College, Andhra Pradesh, in 2007, and the M.Tech degree
from National Institute of Technology Hamirpur, in 2010. He is currently
working towards the PhD degree from Indian Institute of Technology Roorkee,
India. His current research interests include time domain numerical methods to
approach fast transients characterization techniques, modeling of VLSI on-chip
interconnects, carbon based nano interconnects and through silicon vias.

Amalendu Patnaik
received his PhD in Electronics from Berhampur University in 2003. He is currently
serving as Associate Professor in the department of Electronics and
Communication Engineering, Indian Institute of Technology Roorkee. He served as
a Lecturer in National Institute of Science and Technology, Berhampur, India.
During 2004-05, he has been to University of New Mexico, Albuquerque, USA as a
Visiting Scientist. He has published more than 50 papers in journal and
conferences, co-authored one book on Engineering Electromagnetics, and one book
chapter on Neural Network for Antennas in
Modern Antenna Handbook from Wiley. Besides this, he has presented his
research work as short courses/tutorials in many national and international
conferences. His current research interests include array signal processing,
application of soft-computing techniques in Electromagnetics, CAD for patch
antennas, EMI and EMC. He wasawarded the IETE Sir J. C. Bose Award in 1998 and
BOYSCAST Fellowship in 2004-05 from Department of Science and Technology,
Government of India. Dr. Patnaik is a life member of Indian Society for
Technical Education (ISTE), Senior Member of IEEE and IEEE AP-S Region 10
Distinguished Speaker.