Design, Analysis and Test of Logic Circuits Under Uncertainty

2013
ISBN: 978-90-481-9643-2
Verlag: Springer Netherlands

Buch, Englisch, Band 115, 124 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 3317 g

Reihe: Lecture Notes in Electrical Engineering

Logic circuits are becoming increasingly susceptible to probabilistic behavior caused by external radiation and process variation. In addition, inherently probabilistic quantum- and nano-technologies are on the horizon as we approach the limits of CMOS scaling. Ensuring the reliability of such circuits despite the probabilistic behavior is a key challenge in IC design---one that necessitates a fundamental, probabilistic reformulation of synthesis and testing techniques. This monograph will present techniques for analyzing, designing, and testing logic circuits with probabilistic behavior.

Zielgruppe

Research

Autoren/Hrsg.

Krishnaswamy, Smita

Hayes, John P.

Markov, Igor L.

Fachgebiete

• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
• Mathematik | Informatik EDV | Informatik Informatik

Inhaltsverzeichnis

Introduction.- Probabilistic Transfer Matrices.- Computing with Probabilistic Transfer Matrices.- Testing Logic Circuits for Probabilistic Faults.- Signtaure-based Reliability Analysis.- Design for Robustness.- Summary and Extensions.