Advances in Computers

Erscheinungsjahr 2022
ISBN: 978-0-323-85688-1
Verlag: William Andrew Publishing

Buch, Englisch, 370 Seiten, Format (B × H): 152 mm x 229 mm, Gewicht: 700 g

Advances in Computers, Volume 124 presents updates on innovations in computer hardware, software, theory, design and applications, with this updated volume including new chapters on Traffic-Load-Aware Virtual Channel Power-gating in Network-on-Chips, An Efficient DVS Scheme for On-chip Networks, A Power-Performance Balanced Network-on-Chip for Mixed CPU-GPU Systems, Routerless Networks-on-Chip, Routing Algorithm Design for Power- and Temperature-Aware NoCs, Approximate Communication for Energy-Efficient Network-on-Chip, Power-Efficient NoC Design by Partial Topology Reconfiguration, The Design of a Deflection-based Energy-efficient On-chip Network, and Power-Gating in Networks-on-Chip.

Zielgruppe

<p>Researchers in high performance computer areas, hardware manufacturers, educational programs in physics and scientific computation and in computer science</p>

Autoren/Hrsg.

Namasudra, Suyel

Fachgebiete

• Mathematik | Informatik Mathematik Mathematik Allgemein
• Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Software Engineering

Inhaltsverzeichnis

Preface Ali R. Hurson 1. Traffic-Load-Aware Virtual Channel Power-gating in Network-on-Chips Hamid Sarbazi-Azad 2. An Efficient DVS Scheme for On-chip Networks Hamid Sarbazi-Azad 3. A Power-Performance Balanced Network-on-Chip for Mixed CPU-GPU Systems Hamid Sarbazi-Azad 4. Routerless Networks-on-Chip Bella Bose and Fawaz Alazemi 5. Routing Algorithm Design for Power- and Temperature-Aware NoCs Masoumeh Ebrahimi and Kun-Chih (Jimmy) Chen 6. Approximate Communication for Energy-Efficient Network-on-Chip Ling Wang 7. Power-Efficient NoC Design by Partial Topology Reconfiguration Mehdi Modarressi 8. The Design of a Deflection-based Energy-efficient On-chip Network Onur Mutlu and Rachata Ausavarungnirun 9. Power-Gating in Networks-on-Chip Shaahin Hessabi

Über Autor(innen)

Namasudra, Suyel
Suyel Namasudra has received Ph.D. degree from the National Institute of Technology Silchar, Assam, India. He was a post-doctorate fellow at the International University of La Rioja (UNIR), Spain. Currently, Dr. Namasudra is working as an assistant professor in the Department of Computer Science and Engineering at the National Institute of Technology Agartala, Tripura, India. Before joining the National Institute of Technology Agartala, Dr. Namasudra was an assistant professor in the Department of Computer Science and Engineering at the National Institute of Technology Patna, Bihar, India. His research interests include blockchain technology, cloud computing, DNA computing, and information security. Dr. Namasudra has edited 7 books, 5 patents, and 85 publications in conference proceedings, book chapters, and refereed journals like IEEE TII, IEEE TCE, IEEE T-ITS, IEEE TSC, IEEE TCSS, IEEE TCBB, ACM TOMM, ACM TOSN, ACM TALLIP, FGCS, CAEE, and many more. He is the Editor-in-Chief of the Cloud Computing and Data Science (ISSN: 2737-4092 (online)) journal. Dr. Namasudra has served as a Lead Guest Editor/Guest Editor in many reputed journals like IEEE TCE (IEEE, IF: 4.3), IEEE TBD (IEEE, IF: 7.2), ACM TOMM (ACM, IF: 3.144), MONET (Springer, IF: 3.426), CAEE (Elsevier, IF: 3.818), CAIS (Springer, IF: 4.927), CMC (Tech Science Press, IF: 3.772), Sensors (MDPI, IF: 3.576), and many more. He has also participated in many international conferences as an organizer and session chair. Dr. Namasudra is a senior member of IEEE, and a member of ACM and IEI. He has been featured in the list of the top 2% scientists in the world in 2021, 2022, and 2023. His h-index is 37.