RESEARCH INFRASTRUCTURES FOR H

Erscheinungsjahr 2015
ISBN: 978-1-62705-831-5
Verlag: MORGAN & CLAYPOOL

Buch, Englisch, 99 Seiten, Paperback, Format (B × H): 187 mm x 235 mm

Reihe: Synthesis Lectures on Computer Architecture

Hardware acceleration in the form of customized datapath and control circuitry tuned to specific applications has gained popularity for its promise to utilize transistors more efficiently. Historically, the computer architecture community has focused on general-purpose processors, and extensive research infrastructure has been developed to support research efforts in this domain. Envisioning future computing systems with a diverse set of general-purpose cores and accelerators, computer architects must add accelerator-related research infrastructures to their toolboxes to explore future heterogeneous systems. This book serves as a primer for the field, as an overview of the vast literature on accelerator architectures and their design flows, and as a resource guidebook for researchers working in related areas.

Autoren/Hrsg.

Inhaltsverzeichnis

- Preface
- Acknowledgments
- Why Accelerators, Now?
- A Taxonomy of Accelerators.
- Accelerator Design Flow 101.
- Accelerator Modeling
- Workload Characterization for Accelerators
- Accelerator Benchmarks
- Future Directions
- Bibliography
- Authors' Biographies