Thinking Machines

Machine Learning and Its Hardware Implementation
Erscheinungsjahr 2021
ISBN: 978-0-12-818279-6
Verlag: William Andrew Publishing

Buch, Englisch, 322 Seiten, Format (B × H): 152 mm x 229 mm, Gewicht: 520 g

Thinking Machines: Machine Learning and Its Hardware Implementation covers the theory and application of machine learning, neuromorphic computing and neural networks. This is the first book that focuses on machine learning accelerators and hardware development for machine learning. It presents not only a summary of the latest trends and examples of machine learning hardware and basic knowledge of machine learning in general, but also the main issues involved in its implementation. Readers will learn what is required for the design of machine learning hardware for neuromorphic computing and/or neural networks.

This is a recommended book for those who have basic knowledge of machine learning or those who want to learn more about the current trends of machine learning.

Zielgruppe

Graduate studentsand researchers in computerscience/computer engineering, neural engineering, model prediction

Autoren/Hrsg.

Takano, Shigeyuki

Fachgebiete

• Mathematik | Informatik EDV | Informatik Informatik Rechnerarchitektur
• Mathematik | Informatik EDV | Informatik Informatik Künstliche Intelligenz Maschinelles Lernen

Inhaltsverzeichnis

1. Introduction 2. Traditional Microarchitectures 3. Machine Learning and its Implementation 4. Applications, ASICs, and Domain-Specific Architectures 5. Machine Learning Model Development 6. Performance Improvement Methods 7. Study of Hardware Implementation 8. Keys of Hardware Implementation 9. Conclusion

Appendix A. Basics of Deep Learning B. Modeling of Deep Learning Hardware C. Advanced Network Models D. National Trends for Research and Its Investment E. Machine Learning and Social

Über Autor(innen)

Takano, Shigeyuki
Shigeyuki Takano received a BEEE from Nihon University, Tokyo, Japan and an MSCE from the University of Aizu, Aizuwakamatsu, Japan. He is currently a PhD student of CSE at Keio University, Tokyo, Japan. He previously worked for a leading automotive company and, currently, he is working for a leading high-performance computing company. His research interests include computer architectures, particularly coarse-grained reconfigurable architectures, graph processors, and compiler infrastructures.