Tasic / Serdijn / Setti Circuits and Systems for Future Generations of Wireless Communications

1. Auflage 2009
ISBN: 978-1-4020-9917-5
Verlag: Springer Netherlands
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 306 Seiten

Reihe: Integrated Circuits and Systems

The idea for this book originated from a Special Session on Circuits and Systems for Future Generations of Wireless Communications that was presented at the 2005 InternationalSymposiumon Circuits and Systems, which was then followed by two Special Issues bearing the same title that appeared in the March and April 2008 issues of the IEEE Transactions on Circuits and Systems - Part II: Express Briefs. Out of a large number of great contributions, we have selected those tting best the book format based on their quality. We would like to thank all the authors, the reviewers of the Transactions on Circuits and Systems - Part II, and the reviewers of the nal book material for their efforts in creating this manuscript. We also thank the Springer Editorial Staff for their support in putting together all the good work. We hope that this book will provide you, the reader, with new insights into Circuits and Systems for Future Generations of Wireless Communications.

Aleksandar Tasic: Qualcomm Incorporated, San Diego, California, USA, [e-mail] Wouter A. Serdijn: Department of Microelectronics, Electronics Research Laboratory, Delft University of Technology, Delft, the Netherlands, [e-mail] Lawrence E. Larson: Radio Frequency Integrated Circuits Group University of California San Diego, La Jolla, CA, USA, [e-mail] Gianluca Setti: Department of Engineering (ENDIF), University of Ferrara Advanced Research Center on Electronic Systems (ARCES), University of Bologna, [e-mail]

Autoren/Hrsg.

Tasic, Aleksandar

Serdijn, Wouter A.

Setti, Gianluca

Inhaltsverzeichnis

1;Preface;6
2;Contents;7
3;Introduction;9
4;A Multimode Radio Transceiver for Cellular Applications;12
4.1;2.1 Receiver;12
4.2;2.2 Transmitter;22
4.3;2.3 Summary;30
4.4;References;30
5;Reconfigurable Multi-Band OFDM UWB Receivers: Circuits and System Considerations;33
5.1;3.1 Introduction;33
5.2;3.2 Receiver Specifications;34
5.3;3.3 Design Challenges in UWB Receiver Front-Ends;37
5.4;3.4 Evolution and State-of-the-Art in UWB Receivers;43
5.5;3.5 UWB Architecture;45
5.6;3.6 Measurement Results;50
5.7;References;57
6;Low Power UWB Circuits: Front-End Building Blocks;59
6.1;4.1 Introduction;59
6.2;4.2 Ultra Wideband Technology;59
6.3;4.3 Low Noise Amplifiers for UltraWideband Systems;62
6.4;4.4 Pulse Based Transmitters for DS-UWB Systems;77
6.5;4.5 Frequency Synthesis for OFDM UWB;84
6.6;4.6 Summary;86
6.7;References;87
7;CMOS IR-UWB Transceiver System Design for Contact- Less Chip Testing Applications;90
7.1;5.1 Introduction;90
7.2;5.2 Wireless Links and UWBWireless Overview;91
7.3;5.3 IR-UWB Transceiver Systems Architecture for Short-Range Wireless Chip Testing;97
7.4;5.4 IR-UWB Transmitter Designs;98
7.5;5.5 Magnetic Coupling Transformer forWireless Interconnect;107
7.6;5.6 UWB LNA Design Approaches;111
7.7;5.7 Proposed UWB Transceiver Circuit Implementations;119
7.8;5.8 Conclusions;122
7.9;References;123
8;Multi-mode Power Amplifiers for Wireless Handset Applications;125
8.1;6.1 Introduction;125
8.2;6.2 Power Amplifier Technologies;126
8.3;6.3 Efficiency Enhancement;129
8.4;6.4 Linearity Improvement;135
8.5;6.5 Measurement Results;142
8.6;6.6 Summary;146
8.7;References;146
9;Polyphase Multipath Circuits for Cognitive Radio and Flexible Multi- phase Clock Generation;149
9.1;7.1 Introduction;149
9.2;7.2 Flexible RX/RFS: Not Just an ADC;150
9.3;7.3 Sampling Clock Jitter Requirements;151
9.4;7.4 Flexible TX: Not Just a DAC;152
9.5;7.5 Polyphase Multipath Circuits for Spectral Purity Enhancement;154
9.6;7.6 Mixer: Phase and Frequency Shifter;156
9.7;7.7 Filter-Less Power Up-Converter;157
9.8;7.8 Multi-phase Clock Requirements;160
9.9;7.9 DLL MPCG Jitter;161
9.10;7.10 SR MPCG Jitter;162
9.11;7.11 Comparison Between DLL and SR Jitter;163
9.12;7.12 Simulation Results;170
9.13;7.13 Conclusion;171
9.14;References;171
10;IIP2 Improvement Techniques for Multi- standard Mobile Radio;173
10.1;8.1 Introduction;173
10.2;8.2 IIP2 Requirements of MS-Radio;175
10.3;8.3 Second Order Nonlinearity Sources;176
10.4;8.4 Second Order Nonlinearity of Input Stage;179
10.5;8.5 IIP2 Calibration Technique;187
10.6;8.6 Second Order Nonlinearity of Switching Pairs;195
10.7;8.7 Conclusion;204
10.8;References;205
11;Multi-standard Continuous-Time Sigma-Delta Converters for 4G Radios;207
11.1;9.1 Introduction;207
11.2;9.2 Specifications for ADCs in 4G Radios;208
11.3;9.3 Topology Exploration Based on Power Considerations;209
11.4;9.4 Proposed Reconfigurable DSM;221
11.5;9.5 Conclusions;224
11.6;References;225
12;Power Efficient Reconfigurable Baseband Filters for Multimode Radios;226
12.1;10.1 Introduction;226
12.2;10.2 The gm - C Filter Architecture and Circuit Discussion;228
12.3;10.3 Design Optimization and Strategy;231
12.4;10.4 Multimode Reconfigurable gm - C Filters;237
12.5;10.5 Measurements Results;243
12.6;10.6 Conclusion;250
12.7;References;250
13;An Adaptive Digital Front-End for Multi-mode Wireless Receivers;252
13.1;11.1 Introduction;252
13.2;11.2 Interferer Scenarios;253
13.3;11.3 Architecture of the Adaptive Multi-ModeWireless Receiver;254
13.4;11.4 Concept and Design of an Adaptive Multi-Mode Low- Power DFE;257
13.5;11.5 Simulation Results for the Digital Front-End;268
13.6;11.6 Conclusion;271
13.7;References;272
14;FEC Decoders for FutureWireless Devices: Scalability Issues and Multi- standard Capabilities;274
14.1;12.1 Introduction;274
14.2;12.2 Decoders Supporting a Single Code Family;276
14.3;12.3 Decoders Supporting Multiple Code Families;288
14.4;12.4 Simultaneous Multi-Standard FEC Decoding;296
14.5;12.5 Conclusions;297
14.6;References;298
15;Index;301