The Datacenter as a Computer

Designing Warehouse-Scale Machines
Third Auflage
ISBN: 978-1-68173-433-0
Verlag: Morgan & Claypool Publishers

Buch, Englisch, 207 Seiten, Paperback, Format (B × H): 190 mm x 235 mm

Reihe: Synthesis Lectures on Computer Architecture

This book describes warehouse-scale computers (WSCs), the computing platforms that power cloud computing and all the great web services we use every day. It discusses how these new systems treat the datacenter itself as one massive computer designed at warehouse scale, with hardware and software working in concert to deliver good levels of internet service performance. The book details the architecture of WSCs and covers the main factors influencing their design, operation, and cost structure, and the characteristics of their software base. Each chapter contains multiple real-world examples, including detailed case studies and previously unpublished details of the infrastructure used to power Google's online services. Targeted at the architects and programmers of today's WSCs, this book provides a great foundation for those looking to innovate in this fascinating and important area, but the material will also be broadly interesting to those who just want to understand the infrastructure powering the internet.

The third edition reflects four years of advancements since the previous edition and nearly doubles the number of pictures and figures. New topics range from additional workloads like video streaming, machine learning, and public cloud to specialized silicon accelerators, storage and network building blocks, and a revised discussion of data center power and cooling, and uptime. Further discussions of emerging trends and opportunities ensure that this revised edition will remain an essential resource for educators and professionals working on the next generation of WSCs.

Autoren/Hrsg.

Fachgebiete

• Mathematik | Informatik EDV | Informatik Informatik Rechnerarchitektur
• Mathematik | Informatik EDV | Informatik EDV & Informatik Allgemein
• Mathematik | Informatik EDV | Informatik Daten / Datenbanken

Inhaltsverzeichnis

- Acknowledgments
- Introduction
- Workloads and Software Infrastructure
- WSC Hardware Building Blocks
- Data Center Basics: Building, Power, and Cooling
- Energy and Power Efficiency
- Modeling Costs
- Dealing with Failures and Repairs
- Closing Remarks
- Bibliography
- Author Biographies

Über Autor(innen)

Luiz André Barroso has worked across several engineering areas including web search, software infrastructure, storage availability, energy efficiency, and hardware design. He was the first manager of Google's Platforms Engineering team, the group responsible for designing the company's computing platform, and currently leads engineering infrastructure for Google Maps. Prior to Google, he was a member of the research staff at Digital Equipment Corporation (later acquired by Compaq), where his group did some of the pioneering work on processor and memory system design for multi-core CPUs. He holds a Ph.D. in computer engineering from the University of Southern California and B.S/M.S. degrees in electrical engineering from the PUC, Rio de Janeiro. Luiz is a Google Fellow, a Fellow of the ACM, and a Fellow of the American Association for the Advancement of Science.

Urs Hölzle served as Google's first vice president of engineering and has been leading the development of Google's technical infrastructure since 1999. His current responsibilities include the design and operation of the servers, networks, datacenters, and software infrastructure that power Google's internal and external cloud platforms. He is also renowned for both his red socks and his freerange Leonberger, Yoshka (Google's original top dog). Urs grew up in Switzerland and received a master's degree in computer science from ETH Zürich and, as a Fulbright scholar, a Ph.D. from Stanford. While at Stanford (and then a start-up later acquired by Sun Microsystems), he invented fundamental techniques used in most of today's leading Java compilers. Before joining Google, he was a professor of computer science at the University of California, Santa Barbara. He is a Fellow of the ACM and AAAS, a member of the Swiss Academy of Technical Sciences and the National Academy of Engineering, and serves on the board of the US World Wildlife Fund.

Parthasarathy Ranganathan is the area tech lead for Google's computing and datacenter hardware. Prior to this, he was an HP Fellow and Chief Technologist at Hewlett Packard Labs, where he ledtheir research on systems and datacenters. Partha has worked on several interdisciplinary systems projects with broad impact on both academia and industry, including widely used innovations in energy-aware user interfaces, heterogeneous multi-cores, power-efficient servers, accelerators, and disaggregated and data-centric data centers. He has published extensively and is a co-inventor on more than 100 patents. He has been named a top-15 enterprise technology rock star by Business Insider, one of the top 35 young innovators in the world by MIT Tech Review, and is a recipient of the ACM SIGARCH Maurice Wilkes award and Rice University's Outstanding Young Engineering Alumni award. Partha is currently a Google distinguished engineer and is also a Fellow of the IEEE and ACM.

Margaret Martonosi is the Hugh Trumbull Adams '35 Professor of Computer Science at Princeton University, where she has been on the faculty since 1994. She is also currently serving a four-year term as Director of the Keller Center for Innovation in Engineering Education. Martonosi holds affiliated faculty appointments in Princeton EE, the Center for Information Technology Policy (CITP), the Andlinger Center for Energy and the Environment, and the Princeton Environmental Institute. She also holds an affiliated faculty appointment in Princeton EE. From 2005-2007, she served as Associate Dean for Academic Affairs for the Princeton University School of Engineering and Applied Science. In 2011, she served as Acting Director of Princeton's Center for Information Technology Policy (CITP). From August 2015 through March, 2017, she served as a Jefferson Science Fellow within the U.S. Department of State.

Martonosi's research interests are in computer architecture and mobile computing, with particular focus on power-efficient systems. Her work has included the development of the Wattch power modeling tool and the Princeton ZebraNet mobile sensor network project for the design and real-world deployment of zebra tracking collars in Kenya. Her current research focuses on hardware-software interface approaches to manage heterogeneous parallelism and power-performance tradeoffs in systems ranging from smartphones to chip multiprocessors to large-scale data centers. Martonosi is a Fellow of both IEEE and ACM. Notable awards include the 2010 Princeton University Graduate Mentoring Award, the 2013 NCWIT Undergraduate Research Mentoring Award, the 2013 Anita Borg Institute Technical Leadership Award, the 2015 Marie Pistilli Women in EDA Achievement Award, the 2015 ISCA Long-Term Influential Paper Award, and the 2017 ACM SIGMOBILE Test-of-Time Award. In addition to many archival publications, Martonosi is an inventor on seven granted US patents, and has co-authored two technical reference books on power-aware computer architecture. She has served on the Board of Directors of the Computing Research Association (CRA), and will co-chair CRA-W from 2017-2020. Martonosi completed her Ph.D. at Stanford University, and also holds a Master's degree from Stanford and a bachelor's degree from Cornell University, all in Electrical Engineering.