Power-Aware Computer Systems

Second International Workshop, PACS 2002 Cambridge, MA, USA, February 2, 2002, Revised Papers
2003
ISBN: 978-3-540-01028-9
Verlag: Springer Berlin Heidelberg

Buch, Englisch, Band 2325, 226 Seiten, Paperback, Format (B × H): 155 mm x 235 mm, Gewicht: 359 g

Reihe: Lecture Notes in Computer Science

complexityheuristicwhichschedulesreal-timetaskssuchthatnotaskmissesits deadlineandthetotalenergysavingsaremaximized. Theotherpapersinthis group(1)tunethesystem-levelparallelismtothecurrent-levelofpower/energy availabilityandoptimizethesystempowerutilization,and(2)performadaptive texturemappinginreal-time3Dgraphicssystemsbasedonamodelofhuman visualperceptiontoachievesigni?cantpowersavingswithoutnoticeableimage qualitydegradation. Thethirdgroupofpapersfocusonpowermodelingandmonitoringincluding statisticalpro?lingtodetectsoftwarehotspotsofpower,andusingPetriNetsto modelDRAMpowerpolicies. Thisgroupalsoincludesasimulatorforevaluating theperformanceandpowerofdynamicvoltagescalingalgorithms. Thelast groupconcentratesonOS and compilersfor lowpower. The ?rst paperproposesapplication-issueddirectivestosetthepowermodesindevices suchasadiskdrive. Thesecondpaperproposespoliciesforcluster-widepower VI Preface management. Thepoliciesemploycombinationsofdynamicvoltagescalingand turningonando?toreduceoverallclusterpower. PACS2002wasahighlysuccessfulforumduetothehigh-qualitysubmissions, theenormouse?ortsoftheprogramcommitteeandthekeynotespeaker,andthe attendees. WewouldliketothankRonnyRonenforanexcellentkeynotespeech, showingthetechnologicalscalingtrendsandtheirimpactonenergy/powerc- sumption in general-purposemicroprocessors,and pinpointing recentmicro- chitecturalstrategiestoachievemorepower-e?cientmicroprocessors. Wewould like to also thank Antonio Gonzalez, Andreas Moshovos,John Kalamatianos, andothermembersoftheHPCA-8organizingcommitteewhohelpedarrange forlocalaccomodationandpublicizetheworkshop. February2002 BabakFalsa?andT. N. Vijaykumar PACS2002 Program Committee BabakFalsa?,CarnegieMellonUniversity(co-chair) T. N. Vijaykumar,PurdueUniversity(co-chair) DaveAlbonesi,UniversityofRochester KrsteAsanovic,MassachusettsInstituteofTechnology IrisBahar,BrownUniversity LucaBenini,UniversityofBologna DougCarmean,Intel Yuen Chan,IBM KeithFarkas,CompaqWRL MaryJaneIrwin,PennsylvaniaStateUniversity StefanosKaxiras,AgereSystems PeterKogge,UniversityofNotreDame UliKremer,RutgersUniversity AlvinLebeck,DukeUniversity AndreasMoshovos,UniversityofToronto RajRajkumar,CarnegieMellonUniversity KaushikRoy,PurdueUniversity Table of Contents Power-Aware Architecture/Microarchitecture Early-StageDe?nitionofLPX:ALowPowerIssue-ExecuteProcessor. 1 P. Bose,D. Brooks,A. Buyuktosunoglu,P. Cook,K. Das,P. Emma, M. Gschwind,H. Jacobson,T. Karkhanis,P. Kudva,S. Schuster, J. Smith,V. Srinivasan,V. Zyuban,D. Albonesi,andS. Dwarkadas DynamicTag-CheckOmission: ALowPowerInstructionCacheArchitecture ExploitingExecutionFootprints. 18 KojiInoue,VasilyMoshnyaga,andKazuakiMurakami AHardwareArchitecture forDynamicPerformanceandEnergyAdaptation. 33 PhillipStanley-Marbell,MichaelS. Hsiao,andUlrichKremer Multi-processorComputerSystemHavingLowPowerConsumption. 53 C. MichaelOlsenandL. AlexMorrow Power-Aware Real-TimeSystems AnIntegratedHeuristicApproach toPower-AwareReal-TimeScheduling. 68 PedroMejia,EugeneLevner,andDanielMoss´e Power-AwareTaskMotionforEnhancingDynamicRange ofEmbeddedSystemswithRenewableEnergySources. 84 JinfengLiu,PaiH. Chou,andNaderBagherzadeh ALow-PowerContent-AdaptiveTextureMappingArchitecture forReal-Time3DGraphics. 99 JeongseonEuh,JeevanChittamuru,andWayneBurleson Power Modelingand Monitoring Energy-DrivenStatisticalSampling:DetectingSoftwareHotspots. 110 FayChang,KeithI. Farkas,andParthasarathyRanganathan ModelingofDRAMPowerControlPolicies UsingDeterministicandStochasticPetriNets. 130 XiaoboFan,CarlaS. Ellis,andAlvinR. Lebeck SimDVS:AnIntegratedSimulationEnvironment forPerformanceEvaluationofDynamicVoltageScalingAlgorithms.

Zielgruppe

Research

Autoren/Hrsg.

Vijaykumar, T. N.

Falsafi, Babak

Fachgebiete

• Mathematik | Informatik EDV | Informatik Betriebssysteme Windows Betriebssysteme
• Mathematik | Informatik EDV | Informatik Technische Informatik Hochleistungsrechnen, Supercomputer
• Mathematik | Informatik EDV | Informatik Technische Informatik Systemverwaltung & Management
• Mathematik | Informatik EDV | Informatik Technische Informatik Hardware: Grundlagen und Allgemeines
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
• Mathematik | Informatik EDV | Informatik Informatik Rechnerarchitektur

Inhaltsverzeichnis

Power-Aware Architecture/Microarchitecture.- Early-Stage Definition of LPX: A Low Power Issue-Execute Processor.- Dynamic Tag-Check Omission: A Low Power Instruction Cache Architecture Exploiting Execution Footprints.- A Hardware Architecture for Dynamic Performance and Energy Adaptation.- Multi-Processor Computer System Having Low Power Consumption.- Power-Aware Real-Time Systems.- An Integrated Heuristic Approach to Power-Aware Real-Time Scheduling.- Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources.- A Low-Power Content-Adaptive Texture Mapping Architecture for Real-Time 3D Graphics.- Power Modeling and Monitoring.- Energy-Driven Statistical Sampling: Detecting Software Hotspots.- Modeling of DRAM Power Control Policies Using Deterministic and Stochastic Petri Nets.- SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms.- Power-Aware OS and Compilers.- Application-Supported Device Management for Energy and Performance.- Energy-Efficient Server Clusters.- Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches.