Buch, Englisch, 288 Seiten, Format (B × H): 152 mm x 229 mm, Gewicht: 570 g
Buch, Englisch, 288 Seiten, Format (B × H): 152 mm x 229 mm, Gewicht: 570 g
ISBN: 978-0-12-420232-0
Verlag: William Andrew Publishing
Zielgruppe
Researchers in high performance computer areas, hardware manufacturers, physics and scientific computation and computer science educational programs
Fachgebiete
Weitere Infos & Material
1. Register-Level Communication in Speculative Chip Multiprocessors Milan B. Radulovic, Milo V. Tomasevic and Veljko M. Milutinovic 2. Survey on System I/O Hardware Transactions and Impact on Latency, Throughput, and Other Factors Steen Larsen and Ben Lee 3. Hardware and Application Profiling Tools Tomislav Janjusic and Krishna Kavi 4. Model Transformation Using Multi-Objective Optimization Mohamed Wiem Mkaouer and Marouane Kessentini 5. Manual Parallelization Versus State-of-the-Art Parallelization Techniques: The SPEC CPU2006 as a Case Study Aleksandar Vitorovic, Milo V. Tomasevic and Veljko M. Milutinovic