Buch, Englisch, 387 Seiten, Format (B × H): 155 mm x 235 mm, Gewicht: 611 g
9th International Conference on Formal Engineering Methods, ICFEM 2007, Boca Raton, Florida, USA, November 14-15, 2007, Proceedings
Buch, Englisch, 387 Seiten, Format (B × H): 155 mm x 235 mm, Gewicht: 611 g
Reihe: Programming and Software Engineering
ISBN: 978-3-540-76648-3
Verlag: Springer
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
- Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Programmierung: Methoden und Allgemeines
- Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Prozedurale Programmierung
- Mathematik | Informatik EDV | Informatik Informatik Logik, formale Sprachen, Automaten
- Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Software Engineering Objektorientierte Softwareentwicklung
Weitere Infos & Material
Invited Talks.- A System Development Process with Event-B and the Rodin Platform.- Challenges in Software Certification.- Security and Knowledge.- Integrating Formal Methods with System Management.- Formal Engineering of XACML Access Control Policies in VDM++.- A Verification Framework for Agent Knowledge.- Embedded Systems.- From Model-Based Design to Formal Verification of Adaptive Embedded Systems.- Machine-Assisted Proof Support for Validation Beyond Simulink.- VeSTA: A Tool to Verify the Correct Integration of a Component in a Composite Timed System.- Testing.- Integrating Specification-Based Review and Testing for Detecting Errors in Programs.- Testing for Refinement in CSP.- Reducing Test Sequence Length Using Invertible Sequences.- Automated Analysis.- Model Checking with SAT-Based Characterization of ACTL Formulas.- Automating Refinement Checking in Probabilistic System Design.- Model Checking in Practice: Analysis of Generic Bootloader Using SPIN.- Model Checking Propositional Projection Temporal Logic Based on SPIN.- Hardware.- A Denotational Semantics for Handel-C Hardware Compilation.- Automatic Generation of Verified Concurrent Hardware.- Modeling and Verification of Master/Slave Clock Synchronization Using Hybrid Automata and Model-Checking.- Concurrency.- Efficient Symbolic Execution of Large Quantifications in a Process Algebra.- Formalizing SANE Virtual Processor in Thread Algebra.- Calculating and Composing Progress Properties in Terms of the Leads-to Relation.- Erratum.- Erratum to: Challenges in Software Certification.