Transaction Processing on Modern Hardware | Buch | 978-1-68173-499-6 | sack.de

Buch, Englisch, 138 Seiten, Paperback, Format (B × H): 190 mm x 235 mm

Reihe: Synthesis Lectures on Data Management

Transaction Processing on Modern Hardware


Erscheinungsjahr 2019
ISBN: 978-1-68173-499-6
Verlag: Morgan & Claypool Publishers

Buch, Englisch, 138 Seiten, Paperback, Format (B × H): 190 mm x 235 mm

Reihe: Synthesis Lectures on Data Management

ISBN: 978-1-68173-499-6
Verlag: Morgan & Claypool Publishers


The last decade has brought groundbreaking developments in transaction processing. This resurgence of an otherwise mature research area has spurred from the diminishing cost per GB of DRAM that allows many transaction processing workloads to be entirely memory-resident. This shift demanded a pause to fundamentally rethink the architecture of database systems. The data storage lexicon has now expanded beyond spinning disks and RAID levels to include the cache hierarchy, memory consistency models, cache coherence and write invalidation costs, NUMA regions, and coherence domains. New memory technologies promise fast non-volatile storage and expose unchartered trade-offs for transactional durability, such as exploiting byte-addressable hot and cold storage through persistent programming that promotes simpler recovery protocols. In the meantime, the plateauing single-threaded processor performance has brought massive concurrency within a single node, first in the form of multi-core, and now with many-core and heterogeneous processors.

The exciting possibility to reshape the storage, transaction, logging, and recovery layers of next-generation systems on emerging hardware have prompted the database research community to vigorously debate the trade-offs between specialized kernels that narrowly focus on transaction processing performance vs. designs that permit transactionally consistent data accesses from decision support and analytical workloads. In this book, we aim to classify and distill the new body of work on transaction processing that has surfaced in the last decade to navigate researchers and practitioners through this intricate research subject.
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Autoren/Hrsg.


Weitere Infos & Material


- Introduction
- Transaction Concepts
- Multi-Version Concurrency Revisited
- Coordination-Avoidance Concurrency
- Novel Transactional System Architectures
- Hardware Assisted Transactional Utilities
- Transactions on Heterogeneous Hardware
- Outlook: The Era of Hardware Specialization and Beyond
- Bibliography
- Authors' Biographies


Mohammad Sadoghi is an Assistant Professor in the Computer Science Department at the University of California, Davis. Formerly, he was an Assistant Professor at Purdue University. Prior to joining academia, he was a Research Staff Member at IBM T.J. Watson Research Center for nearly four years. He received his Ph.D. from the Computer Science Department at the University of Toronto in 2013. At UC Davis, Prof. Sadoghi leads the ExpoLab research group with the aim to pioneer a new exploratory data platform—referred to as ExpoDB—a distributed ledger that unifies secure transactional and real-time analytical processing, all centered around a democratic and decentralized computational model.

Spyros Blanas is an Assistant Professor in the Department of Computer Science and Engineering at The Ohio State University since 2014. He received his Ph.D. at the University of Wisconsin–Madison, where he was a member of the Database Systems group and the Microsoft Jim Gray Systems Lab. Part of his Ph.D. dissertation was commercialized in Microsoft SQL Server 2014 as the Hekaton in-memory transaction processing engine. His research interest is high-performance database systems and his current goal is to build a data management system for high-end computing facilities. Prof. Blanas has published in leading database and systems conferences (e.g. SIGMOD, VLDB, EuroSys, SoCC) and his research contributions have been recognized with the IEEE TCDE Rising Star award. This year he is the PC vice-chair for transaction processing for ICDE'18. He regularly serves on the program committees of SIGMOD, VLDB, ICDE, SoCC, SSDBM, CIKM; he has been reviewing for the VLDB Journal, IEEE TKDE, IEEE TPDS, ACM TODS, and the SIGMOD Record.

H. V. Jagadish is Bernard A Galler Collegiate Professor of Electrical Engineering and Computer Science, and Distinguished Scientist at the Institute for Data Science, at the University of Michigan in Ann Arbor. Prior to 1999, he was Head of the Database Research Department at AT&T Labs, Florham Park, NJ. Professor Jagadish is well known for his broad-ranging research on information management, and has approximately 200 major papers and 37 patents. He is a fellow of the ACM, ""The First Society in Computing,"" (since 2003) and serves on the board of the Computing Research Association (since 2009). He has been an Associate Editor for the ACM Transactions on Database Systems (1992-1995), Program Chair of the ACM SIGMOD annual conference (1996), Program Chair of the ISMB conference (2005), a trustee of the VLDB (Very Large DataBase) foundation (2004-2009), Founding Editor-in-Chief of the Proceedings of the VLDB Endowment (2008-2014), and Program Chair of the VLDB Conference (2014). Among his many awards, he won the ACM SIGMOD Contributions Award in 2013 and the David E Liddle Research Excellence Award (at the University of Michigan) in 2008.


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