Yanda / Heynes / Miller | Demystifying Chipmaking | Buch | 978-0-7506-7760-8 | sack.de

Buch, Englisch, 280 Seiten, Format (B × H): 191 mm x 235 mm, Gewicht: 680 g

Yanda / Heynes / Miller

Demystifying Chipmaking


Erscheinungsjahr 2021
ISBN: 978-0-7506-7760-8
Verlag: Elsevier Science & Technology

Buch, Englisch, 280 Seiten, Format (B × H): 191 mm x 235 mm, Gewicht: 680 g

ISBN: 978-0-7506-7760-8
Verlag: Elsevier Science & Technology


This book takes the reader through the actual manufacturing process of making a typical chip, from start to finish, including a detailed discussion of each step, in plain language. The evolution of today's technology is added to the story, as seen through the eyes of the engineers who solved some of the problems. The authors are well suited to that discussion since they are three of those same engineers. They have a broad exposure to the industry and its technology that extends all the way back to Shockley Laboratories, the first semiconductor manufacturer in Silicon Valley.

The CMOS (Complementary Metal-Oxide-Semiconductor) process flow is the focus of the discussion and is covered in ten chapters. The vast majority of chips made today are fabricated using this general method. In order to ensure that all readers are comfortable with the vocabulary, the first chapter carefully and clearly introduces the science concepts found in later chapters. A chapter is devoted to pointing out the differences in other manufacturing methods, such as the gallium arsenide technology that produces chips for cell phones. In addition, a chapter describing the nature of the semiconductor industry from a business perspective is included.

"The entire process of making a chip is surprisingly easy to understand. The part of the story that defies belief is the tiny dimensions: the conducting wires and other structures on a chip are more than a hundred times thinner than a hair - and getting thinner with every new chip design."
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Zielgruppe


Electronics engineers, engineering managers, and students

Weitere Infos & Material


1. IC Fabrication Overview
2. Support Technologies
3. Forming Wells
4. Isolate Active Areas (Shallow Trench Isolation)
5. Building the Transistors
6. First Level Metallization
7. Multilevel Metal Interconnects and Dual Damascene
8. Test and Assembly
APPENDIX
A: Science Overview
B: Plasma Etch Supplement to Chapter 4


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