Buch, Englisch, 448 Seiten, Format (B × H): 170 mm x 240 mm, Gewicht: 1000 g
Special topic volume with invited papers only.
Buch, Englisch, 448 Seiten, Format (B × H): 170 mm x 240 mm, Gewicht: 1000 g
ISBN: 978-0-87849-391-3
Verlag: Trans Tech Publications
Autoren/Hrsg.
Fachgebiete
- Technische Wissenschaften Maschinenbau | Werkstoffkunde Produktionstechnik Fertigungstechnik
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Halb- und Supraleitertechnologie
- Technische Wissenschaften Maschinenbau | Werkstoffkunde Technische Mechanik | Werkstoffkunde Materialwissenschaft: Elektronik, Optik
Weitere Infos & Material
Dedication III
Dedication 2
Dedication I
Preface
Chapter 1: Historical RTP Review
The Expanding Role of Rapid Thermal Processing in CMOS Manufacturing
Evolution of Commercial RTP Modules
Chapter 2: Wafer Parameter Tuning and Defects
Fast Diffusion in Germanium and Silicon Investigated by Lamp-Based Rapid Thermal Annealing
Rapid Thermal Processing and the Control of Oxygen Precipitation Behaviour in Silicon Wafers
High Temperature RTP Application in SOI Manufacturing
Chapter 3: Surface Preparation and Gate Dielectrics
Cleaning of Silicon Surfaces for Nanotechnology
Heavy Water in Gate Stack Processing
Advanced Gate Dielectric Development for VLSI Technology
A Growth Kinetics Model for the Radical Oxidation of Silicon
Investigation of Ultra Thin Thermal Nitrided Gate Dielectrics in Comparison to Plasma Nitrided Gate Dielectrics for High-Performance Logic Application for 65nm
High-K: Latest Developments and Perspectives
Production Worthy ALD in Batch Reactors
Chapter 4: USJ Formation and Metrology
Ultra Shallow Depth Profiling with SIMS
Implant Annealing – An Evolution from Soak over Spike to Millisecond Annealing
A Light-Induced Annealing of Silicon Implanted Layers
Laser Annealing of Implanted Semiconductor Layers – One Bridge to Nano-Processing
An Overview of ms Annealing for Deep Sub-Micron Activation
Extended Defects Evolution in Pre-Amorphised Silicon after Millisecond Flash Anneals
Modeling and Simulation of Advanced Annealing Processes
Vacancy Engineering – An Ultra-Low Thermal Budget Method for High-Concentration 'Diffusionless' Implantation Doping
Ultra-Shallow Junction Formation Using Rapid Thermal Processing
Ultra-Rapid Thermal Process for ULSIs
Advanced Millisecond Annealing Technologies and its Applications and Concerns on Advanced Logic LSI Fabrication Processes
Doping Strategies for FinFETs
Chapter 5: Advanced Silicides Formation
RTP Requirements for CMOS Integration of Dual Work Function Phase Controlled Ni-FUSI (Fully Silicided) Gates with Simultaneous Silicidation of nMOS (NiSi) and pMOS (Ni-Rich Silicide) Gates on HfSiON
Chapter 6: Pattern Effects
A Short History of Pattern Effects in Thermal Processing
Conduction Heating in RTP Fast, and Pattern-Independent
Advanced Annealing Schemes for High-Performance SOI Logic Technologies
Chapter 7: Temperature Measurement
Model Based Measurement in Advanced Rapid Thermal Processing
Chapter 8: Flash Annealing for ULSI and Beyond Si
Short Time Thermal Processing: From Electronics via Photonics to Pipe Organs of the 17th Century